* Disable early-syntaxing mechanism, and change back end to generate

* Disable early-syntaxing mechanism, and change back end to generate
LAP instead of assembler directives.  The assembler is now responsible
for converting the LAP to assembler directives.

* Change RTL and LAP output options to cause RTL and LAP files to be
written as the information is generated.  ".brtl" files are no longer
generated.

* Add concept of "suffix instructions" to the LAP generator.

* Disassociate per-instruction "dead registers" set from the set of
registers that need to be deleted after the instruction is generated.
This is needed because the LAP generator sometimes needs to know which
registers are dead _after_ the dead registers have been deleted.

* Many of the high-level register allocator operations have been
generalized so that they work for both machine and pseudo registers.
This simplifies the writing of powerful rules in the LAP generator.

* The LAP linearizer has been improved to notice certain common graph
patterns and generate them in a fixed way.  For example, if one of the
branches of a conditional goes to a block that is a dead end, the
linearizer will now force the dead-end block to come before the other
branch; this has the advantage that it usually minimizes the branch
distance, and prevents that dead-end block from being far away from
the conditional.

* The value-class abstraction has been generalized to have more
classes, and the use of this information has been made more uniform
and complete.

* The cross-compiler now forces the per-procedure compilation switch
off.

* The `define-rule' macro has been generalized to allow it to be used
with user-defined rulesets.

* The RTL definition macros have been changed to collect the RTL
expression names in sets that indicate their type.

* The compiler now treats self-referential top-level definitions as
static by default.

* New RTL optimization passes perform limited dataflow analysis and
rewriting of the RTL.  These permit the LAP-generation rules to be
tuned to more fully take advantage of the target machine's instruction
set.

* The subproblem free-variable analysis pass has been changed to
memoize information at every CFG node.  The previous memoization
scheme had quadratic time complexity for certain programs.

* The RTL expression simplifier has been changed to force the use of
pseudo registers for all subexpressions, except the right-hand side of
a pseudo-register assignment.  This guarantees the uniformity of the
code-generator's output, permitting the LAP-generator rules to be
reduced to a small minimal set.

* The RTL `unassigned-test' and `true-test' predicate types have been
replaced by `eq-test' with the appropriate argument.

* The RTL `constant' expression type has been replaced (in many
instances) by the new `machine-constant' type.  The former is now used
only when the result is a Scheme object, while the latter is used to
represent constant fields of words.  A `machine-constant' always has
an exact integer value.

* The RTL `offset' expression type has been changed so that it no
longer requires its first argument to be a register; now that may be
an arbitrary RTL expression.

* The RTL code compressor has been improved to handle many more
instruction types, and to permit stack-slot reference expressions to
be moved over stack pushes, adjusting their offsets in the process.

* The RTL CSE was not copying its state correctly, and as a result was
not doing as good a job as possible across certain conditional
branches.