Add code to flush the I-cache at the right times: After storing an

execute cache entry, and after major relocations (GC and
disk-restore).

diff --git a/v7/src/microcode/bchmmg.c b/v7/src/microcode/bchmmg.c
index d50007bcf7a68091972b251e6f059801b0188861..e3d89f5f2b33caaa1602be749ea049ba497efad7 100644 (file)
--- a/v7/src/microcode/bchmmg.c
+++ b/v7/src/microcode/bchmmg.c
@@ -1,6 +1,6 @@
 /* -*-C-*-
 
-$Header: /Users/cph/tmp/foo/mit-scheme/mit-scheme/v7/src/microcode/Attic/bchmmg.c,v 9.52 1990/04/01 20:30:17 jinx Exp $
+$Header: /Users/cph/tmp/foo/mit-scheme/mit-scheme/v7/src/microcode/Attic/bchmmg.c,v 9.53 1990/04/09 14:46:40 jinx Exp $
 
 Copyright (c) 1987, 1988, 1989, 1990 Massachusetts Institute of Technology
 
@@ -757,7 +757,7 @@ Fix_Weak_Chain()
 */
 \f
 void
-GC(initial_weak_chain)
+GC (initial_weak_chain)
      SCHEME_OBJECT initial_weak_chain;
 {
   SCHEME_OBJECT
@@ -865,6 +865,7 @@ GC(initial_weak_chain)
   Current_State_Point = *Root++;
   Fluid_Bindings = *Root++;
   Free_Stacklets = NULL;
+  FLUSH_I_CACHE ();
   return;
 }
 \f

diff --git a/v7/src/microcode/cmpgc.h b/v7/src/microcode/cmpgc.h
index 3ae040558deb6acced08d137c2c39639e2748a0e..e75c0ff47ee4bb172a41580fdc26cfc841c725a3 100644 (file)
--- a/v7/src/microcode/cmpgc.h
+++ b/v7/src/microcode/cmpgc.h
@@ -1,6 +1,8 @@
 /* -*-C-*-
 
-Copyright (c) 1989 Massachusetts Institute of Technology
+$Header: /Users/cph/tmp/foo/mit-scheme/mit-scheme/v7/src/microcode/cmpgc.h,v 1.11 1990/04/09 14:52:57 jinx Exp $
+
+Copyright (c) 1989, 1990 Massachusetts Institute of Technology
 
 This material was developed by the Scheme project at the Massachusetts
 Institute of Technology, Department of Electrical Engineering and
@@ -30,7 +32,7 @@ Technology nor of any adaptation thereof in any advertising,
 promotional, or sales literature without prior written consent from
 MIT in each case. */
 
-/* $Header: /Users/cph/tmp/foo/mit-scheme/mit-scheme/v7/src/microcode/cmpgc.h,v 1.10 1990/04/03 00:04:44 jinx Exp $
+/*
 
 Utilities to relocate compiled code in garbage collection-like processes. 
 
@@ -350,4 +352,13 @@ typedef unsigned short format_word;
   (GC_NO_COMPILER_STMT ())
 
 #endif /* HAS_COMPILER_SUPPORT */
+
+#ifndef FLUSH_I_CACHE
+
+#define FLUSH_I_CACHE ()                                               \
+do {                                                                   \
+} while (0)
+
+#endif /* FLUSH_I_CACHE */
+
 #endif /* CMPGC_H_INCLUDED */

diff --git a/v7/src/microcode/cmpintmd/mips.h b/v7/src/microcode/cmpintmd/mips.h
index 7f9adb0a3ed6c2eeae3cf630cf223e29dc00b8b3..62f863d857c5cb75b89331d32b888add5d814b7f 100644 (file)
--- a/v7/src/microcode/cmpintmd/mips.h
+++ b/v7/src/microcode/cmpintmd/mips.h
@@ -30,7 +30,7 @@ Technology nor of any adaptation thereof in any advertising,
 promotional, or sales literature without prior written consent from
 MIT in each case. */
 
-/* $Header: /Users/cph/tmp/foo/mit-scheme/mit-scheme/v7/src/microcode/cmpintmd/mips.h,v 1.1 1990/04/01 20:14:51 jinx Exp $
+/* $Header: /Users/cph/tmp/foo/mit-scheme/mit-scheme/v7/src/microcode/cmpintmd/mips.h,v 1.2 1990/04/09 14:44:18 jinx Exp $
  *
  * Compiled code interface macros.
  *
@@ -42,6 +42,23 @@ MIT in each case. */
 #ifndef CMPINT2_H_INCLUDED
 #define CMPINT2_H_INCLUDED
 
+#include <sys/syscall.h>
+#include <sys/sysmips.h>
+#include <mips/cachectl.h>
+#if 0
+
+/* advertised, but not provided */
+extern void cacheflush();
+
+#else
+
+extern void syscall();
+
+#define cacheflush(addr,nbytes,cache)                                  \
+  syscall(SYS_sysmips, MIPS_CACHEFLUSH, (addr), (nbytes), (cache))
+
+#endif
+
 #define COMPILER_NONE_TYPE                     0
 #define COMPILER_MC68020_TYPE                  1
 #define COMPILER_VAX_TYPE                      2
@@ -280,7 +297,7 @@ procedures and continuations differ from closures) */
    code to jump to the destination address.  Before linkage, the cache
    contains the callee's name instead of the jump code.
 
-   On MIPS: 4 instructions, the last being a NO-OP (ADDI with
+   On MIPS: 2 instructions, the last being a NO-OP (ADDI with
    destination 0) containing a fixnum representing the number of
    arguments in the lower 16 bits.
  */
@@ -325,11 +342,17 @@ procedures and continuations differ from closures) */
   EXTRACT_ABSOLUTE_ADDRESS(target, address);                           \
 }
 
-/* This is the inverse of EXTRACT_EXECUTE_CACHE_ADDRESS. */
+/* This is the inverse of EXTRACT_EXECUTE_CACHE_ADDRESS.
+   On the MIPS it must flush the I-cache, but there is no
+   need to flush the ADDI instruction, which is a NOP.
+ */
 
 #define STORE_EXECUTE_CACHE_ADDRESS(address, entry)                    \
 {                                                                      \
-  STORE_ABSOLUTE_ADDRESS(entry, address);                              \
+  STORE_ABSOLUTE_ADDRESS (entry, address);                             \
+  cacheflush (address,                                                 \
+             ((sizeof (long)) * (EXECUTE_CACHE_ENTRY_SIZE - 1)),       \
+             ICACHE);                                                  \
 }
 
 /* This stores the fixed part of the instructions leaving the
@@ -342,9 +365,35 @@ procedures and continuations differ from closures) */
  */
 
 #define STORE_EXECUTE_CACHE_CODE(address)                              \
-{  char *opcode_addr = ((char *) (address))+7;                         \
-   *opcode_addr = ADDI_OPCODE<<2;                                      \
+{                                                                      \
+  char *opcode_addr;                                                   \
+                                                                       \
+  opcode_addr = (((char *) (address)) + 7);                            \
+  *opcode_addr = (ADDI_OPCODE << 2);                                   \
 }
+
+/* This flushed the I-cache after a GC or disk-restore.
+   It's needed because the GC has moved code around, and closures
+   and execute cache cells have absolute addresses that the
+   processor might have old copies of.
+ */
+
+#define FLUSH_I_CACHE()                                                        \
+do                                                                     \
+{                                                                      \
+  cacheflush (Heap_Bottom,                                             \
+             ((sizeof(SCHEME_OBJECT)) *                                \
+              (Heap_Top - Heap_Bottom)),                               \
+             ICACHE);                                                  \
+  cacheflush (Constant_Space,                                          \
+             ((sizeof(SCHEME_OBJECT)) *                                \
+              (Constant_Top - Constant_Space)),                        \
+             ICACHE);                                                  \
+  cacheflush (Stack_Pointer,                                           \
+             ((sizeof(SCHEME_OBJECT)) *                                \
+              (Stack_Top - Stack_Pointer)),                            \
+             ICACHE);                                                  \
+} while (0)
 \f
 /* Derived parameters and macros.
 

diff --git a/v7/src/microcode/fasload.c b/v7/src/microcode/fasload.c
index 6337426e5b7adfb99e9152f354121634de81b5dc..b0d353ac3409730f0b34d984193a91cb28e823d7 100644 (file)
--- a/v7/src/microcode/fasload.c
+++ b/v7/src/microcode/fasload.c
@@ -1,6 +1,6 @@
 /* -*-C-*-
 
-$Header: /Users/cph/tmp/foo/mit-scheme/mit-scheme/v7/src/microcode/fasload.c,v 9.51 1990/02/13 16:11:07 cph Exp $
+$Header: /Users/cph/tmp/foo/mit-scheme/mit-scheme/v7/src/microcode/fasload.c,v 9.52 1990/04/09 14:49:59 jinx Exp $
 
 Copyright (c) 1987, 1988, 1989, 1990 Massachusetts Institute of Technology
 
@@ -817,8 +817,10 @@ DEFINE_PRIMITIVE ("LOAD-BAND", Prim_band_load, 1, 1, 0)
   /* Reset implementation state paramenters */
 
   INITIALIZE_INTERRUPTS();
-  Initialize_Stack();
-  Set_Pure_Top();
+  Initialize_Stack ();
+  Set_Pure_Top(); 
+  SET_MEMTOP (Heap_Top - GC_Reserve);
+
   cutl = MEMORY_REF (result, 1);
   if (cutl != SHARP_F)
   {
@@ -850,6 +852,8 @@ DEFINE_PRIMITIVE ("LOAD-BAND", Prim_band_load, 1, 1, 0)
   Prev_Restore_History_Stacklet = NULL;
   Prev_Restore_History_Offset = 0;
 
+  FLUSH_I_CACHE ();
+
   end_band_load(true, false);
   Band_Load_Hook();
 

diff --git a/v7/src/microcode/memmag.c b/v7/src/microcode/memmag.c
index 558a84d42d600d922e69511affe491ac4a3a54b9..e7274f8eb5f92e5bb0cabe5b7bd9044e9fc38c02 100644 (file)
--- a/v7/src/microcode/memmag.c
+++ b/v7/src/microcode/memmag.c
@@ -1,8 +1,8 @@
 /* -*-C-*-
 
-$Header: /Users/cph/tmp/foo/mit-scheme/mit-scheme/v7/src/microcode/memmag.c,v 9.42 1989/11/30 03:03:56 jinx Exp $
+$Header: /Users/cph/tmp/foo/mit-scheme/mit-scheme/v7/src/microcode/memmag.c,v 9.43 1990/04/09 14:45:53 jinx Exp $
 
-Copyright (c) 1987, 1988, 1989 Massachusetts Institute of Technology
+Copyright (c) 1987, 1988, 1989, 1990 Massachusetts Institute of Technology
 
 This material was developed by the Scheme project at the Massachusetts
 Institute of Technology, Department of Electrical Engineering and
@@ -381,6 +381,7 @@ void GC()
   Current_State_Point = *Root++;
   Fluid_Bindings = *Root++;
   Free_Stacklets = NULL;
+  FLUSH_I_CACHE ();
   return;
 }
 \f