From: Guillermo J. Rozas <edu/mit/csail/zurich/gjr>
Date: Thu, 16 Aug 1990 14:45:24 +0000 (+0000)
Subject: Add cache-flushing call to STORE_TRAMPOLINE_ENTRY .
X-Git-Tag: 20090517-FFI~11254
X-Git-Url: https://birchwood-abbey.net/git?a=commitdiff_plain;h=7565ce3018b1bbbf5325310711f457a010f1ee0e;p=mit-scheme.git

Add cache-flushing call to STORE_TRAMPOLINE_ENTRY .
---

diff --git a/v7/src/microcode/cmpintmd/hppa.h b/v7/src/microcode/cmpintmd/hppa.h
index 5b13037f6..ffe3b23f8 100644
--- a/v7/src/microcode/cmpintmd/hppa.h
+++ b/v7/src/microcode/cmpintmd/hppa.h
@@ -1,6 +1,6 @@
 /* -*-C-*-
 
-$Header: /Users/cph/tmp/foo/mit-scheme/mit-scheme/v7/src/microcode/cmpintmd/hppa.h,v 1.14 1990/08/08 20:28:21 jinx Exp $
+$Header: /Users/cph/tmp/foo/mit-scheme/mit-scheme/v7/src/microcode/cmpintmd/hppa.h,v 1.15 1990/08/16 14:45:24 jinx Exp $
 
 Copyright (c) 1989, 1990 Massachusetts Institute of Technology
 
@@ -435,6 +435,7 @@ do {									\
 
 #define STORE_TRAMPOLINE_ENTRY(entry_address, index)			\
 {									\
+  extern void cache_flush_region ();					\
   unsigned long *PC;							\
 									\
   PC = ((unsigned long *) (entry_address));				\
@@ -448,6 +449,7 @@ do {									\
 									\
   *PC++ = (((unsigned long) 0x341c0000) +				\
 	   (((unsigned long) (index)) << 1));				\
+  cache_flush_region (PC, (TRAMPOLINE_ENTRY_SIZE - 1));			\
 }
 
 /* Execute cache entries.
diff --git a/v8/src/microcode/cmpintmd/hppa.h b/v8/src/microcode/cmpintmd/hppa.h
index 958dc3808..e2a9403c7 100644
--- a/v8/src/microcode/cmpintmd/hppa.h
+++ b/v8/src/microcode/cmpintmd/hppa.h
@@ -1,6 +1,6 @@
 /* -*-C-*-
 
-$Header: /Users/cph/tmp/foo/mit-scheme/mit-scheme/v8/src/microcode/cmpintmd/hppa.h,v 1.14 1990/08/08 20:28:21 jinx Exp $
+$Header: /Users/cph/tmp/foo/mit-scheme/mit-scheme/v8/src/microcode/cmpintmd/hppa.h,v 1.15 1990/08/16 14:45:24 jinx Exp $
 
 Copyright (c) 1989, 1990 Massachusetts Institute of Technology
 
@@ -435,6 +435,7 @@ do {									\
 
 #define STORE_TRAMPOLINE_ENTRY(entry_address, index)			\
 {									\
+  extern void cache_flush_region ();					\
   unsigned long *PC;							\
 									\
   PC = ((unsigned long *) (entry_address));				\
@@ -448,6 +449,7 @@ do {									\
 									\
   *PC++ = (((unsigned long) 0x341c0000) +				\
 	   (((unsigned long) (index)) << 1));				\
+  cache_flush_region (PC, (TRAMPOLINE_ENTRY_SIZE - 1));			\
 }
 
 /* Execute cache entries.