From 3975a527ef9cf8ccb9660d0ad56b9f6a44bec2ba Mon Sep 17 00:00:00 2001
From: Chris Hanson <org/chris-hanson/cph>
Date: Fri, 20 Apr 2018 23:45:42 -0700
Subject: [PATCH] Implement new SVM instruction: (pop-return).

---
 src/compiler/machines/svm/assembler-rules.scm |   1 +
 src/microcode/svm1-defns.h                    | 113 +++++++++---------
 src/microcode/svm1-interp.c                   |  20 +++-
 3 files changed, 76 insertions(+), 58 deletions(-)

diff --git a/src/compiler/machines/svm/assembler-rules.scm b/src/compiler/machines/svm/assembler-rules.scm
index 387eb8451..0af5e3883 100644
--- a/src/compiler/machines/svm/assembler-rules.scm
+++ b/src/compiler/machines/svm/assembler-rules.scm
@@ -441,6 +441,7 @@ USA.
 (define-code-sequence instruction (interrupt-test-dynamic-link))
 (define-code-sequence instruction (interrupt-test-ic-procedure))
 (define-code-sequence instruction (interrupt-test-continuation))
+(define-code-sequence instruction (pop-return))
 
 (define-code-sequence instruction
   (flonum-header (_ target word-register)
diff --git a/src/microcode/svm1-defns.h b/src/microcode/svm1-defns.h
index be2193623..835db0afb 100644
--- a/src/microcode/svm1-defns.h
+++ b/src/microcode/svm1-defns.h
@@ -2,7 +2,7 @@
 
 DO NOT EDIT: this file was generated by a program.
 
-Copyright (C) 2012 Massachusetts Institute of Technology
+Copyright (C) 2017 Massachusetts Institute of Technology
 
 This is free software; see the source for copying conditions. There is NO
 warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
@@ -223,7 +223,7 @@ warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
   DECODE_SIGNED_32 (value)
 
 #define SVM1_INST_START_CODE 0x01
-#define SVM1_INST_END_CODE 0xcc
+#define SVM1_INST_END_CODE 0xcd
 
 #define SVM1_INST_BINDINGS(binder) \
   binder (SVM1_INST_STORE_B_WR_ADDR, store_b_wr_addr); \
@@ -376,6 +376,7 @@ warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
   binder (SVM1_INST_INTERRUPT_TEST_DYNAMIC_LINK, interrupt_test_dynamic_link); \
   binder (SVM1_INST_INTERRUPT_TEST_IC_PROCEDURE, interrupt_test_ic_procedure); \
   binder (SVM1_INST_INTERRUPT_TEST_CONTINUATION, interrupt_test_continuation); \
+  binder (SVM1_INST_POP_RETURN, pop_return); \
   binder (SVM1_INST_FLONUM_HEADER_U8, flonum_header_u8); \
   binder (SVM1_INST_FLONUM_HEADER_U16, flonum_header_u16); \
   binder (SVM1_INST_FLONUM_HEADER_U32, flonum_header_u32); \
@@ -1225,284 +1226,286 @@ warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
 
 #define SVM1_INST_INTERRUPT_TEST_CONTINUATION 0x96
 
-#define SVM1_INST_FLONUM_HEADER_U8 0x97
+#define SVM1_INST_POP_RETURN 0x97
+
+#define SVM1_INST_FLONUM_HEADER_U8 0x98
 #define DECODE_SVM1_INST_FLONUM_HEADER_U8(target, value) \
   DECODE_WORD_REGISTER (target); \
   DECODE_UNSIGNED_8 (value)
 
-#define SVM1_INST_FLONUM_HEADER_U16 0x98
+#define SVM1_INST_FLONUM_HEADER_U16 0x99
 #define DECODE_SVM1_INST_FLONUM_HEADER_U16(target, value) \
   DECODE_WORD_REGISTER (target); \
   DECODE_UNSIGNED_16 (value)
 
-#define SVM1_INST_FLONUM_HEADER_U32 0x99
+#define SVM1_INST_FLONUM_HEADER_U32 0x9a
 #define DECODE_SVM1_INST_FLONUM_HEADER_U32(target, value) \
   DECODE_WORD_REGISTER (target); \
   DECODE_UNSIGNED_32 (value)
 
-#define SVM1_INST_FLONUM_HEADER 0x9a
+#define SVM1_INST_FLONUM_HEADER 0x9b
 #define DECODE_SVM1_INST_FLONUM_HEADER(target, n_elts) \
   DECODE_WORD_REGISTER (target); \
   DECODE_WORD_REGISTER (n_elts)
 
-#define SVM1_INST_COPY_WR 0x9b
+#define SVM1_INST_COPY_WR 0x9c
 #define DECODE_SVM1_INST_COPY_WR(target, source) \
   DECODE_WORD_REGISTER (target); \
   DECODE_WORD_REGISTER (source)
 
-#define SVM1_INST_COPY_FR 0x9c
+#define SVM1_INST_COPY_FR 0x9d
 #define DECODE_SVM1_INST_COPY_FR(target, source) \
   DECODE_FLOAT_REGISTER (target); \
   DECODE_FLOAT_REGISTER (source)
 
-#define SVM1_INST_NEGATE_WR 0x9d
+#define SVM1_INST_NEGATE_WR 0x9e
 #define DECODE_SVM1_INST_NEGATE_WR(target, source) \
   DECODE_WORD_REGISTER (target); \
   DECODE_WORD_REGISTER (source)
 
-#define SVM1_INST_NEGATE_FR 0x9e
+#define SVM1_INST_NEGATE_FR 0x9f
 #define DECODE_SVM1_INST_NEGATE_FR(target, source) \
   DECODE_FLOAT_REGISTER (target); \
   DECODE_FLOAT_REGISTER (source)
 
-#define SVM1_INST_INCREMENT_WR 0x9f
+#define SVM1_INST_INCREMENT_WR 0xa0
 #define DECODE_SVM1_INST_INCREMENT_WR(target, source) \
   DECODE_WORD_REGISTER (target); \
   DECODE_WORD_REGISTER (source)
 
-#define SVM1_INST_INCREMENT_FR 0xa0
+#define SVM1_INST_INCREMENT_FR 0xa1
 #define DECODE_SVM1_INST_INCREMENT_FR(target, source) \
   DECODE_FLOAT_REGISTER (target); \
   DECODE_FLOAT_REGISTER (source)
 
-#define SVM1_INST_DECREMENT_WR 0xa1
+#define SVM1_INST_DECREMENT_WR 0xa2
 #define DECODE_SVM1_INST_DECREMENT_WR(target, source) \
   DECODE_WORD_REGISTER (target); \
   DECODE_WORD_REGISTER (source)
 
-#define SVM1_INST_DECREMENT_FR 0xa2
+#define SVM1_INST_DECREMENT_FR 0xa3
 #define DECODE_SVM1_INST_DECREMENT_FR(target, source) \
   DECODE_FLOAT_REGISTER (target); \
   DECODE_FLOAT_REGISTER (source)
 
-#define SVM1_INST_ABS_WR 0xa3
+#define SVM1_INST_ABS_WR 0xa4
 #define DECODE_SVM1_INST_ABS_WR(target, source) \
   DECODE_WORD_REGISTER (target); \
   DECODE_WORD_REGISTER (source)
 
-#define SVM1_INST_ABS_FR 0xa4
+#define SVM1_INST_ABS_FR 0xa5
 #define DECODE_SVM1_INST_ABS_FR(target, source) \
   DECODE_FLOAT_REGISTER (target); \
   DECODE_FLOAT_REGISTER (source)
 
-#define SVM1_INST_OBJECT_TYPE 0xa5
+#define SVM1_INST_OBJECT_TYPE 0xa6
 #define DECODE_SVM1_INST_OBJECT_TYPE(target, source) \
   DECODE_WORD_REGISTER (target); \
   DECODE_WORD_REGISTER (source)
 
-#define SVM1_INST_OBJECT_DATUM 0xa6
+#define SVM1_INST_OBJECT_DATUM 0xa7
 #define DECODE_SVM1_INST_OBJECT_DATUM(target, source) \
   DECODE_WORD_REGISTER (target); \
   DECODE_WORD_REGISTER (source)
 
-#define SVM1_INST_OBJECT_ADDRESS 0xa7
+#define SVM1_INST_OBJECT_ADDRESS 0xa8
 #define DECODE_SVM1_INST_OBJECT_ADDRESS(target, source) \
   DECODE_WORD_REGISTER (target); \
   DECODE_WORD_REGISTER (source)
 
-#define SVM1_INST_FIXNUM_TO_INTEGER 0xa8
+#define SVM1_INST_FIXNUM_TO_INTEGER 0xa9
 #define DECODE_SVM1_INST_FIXNUM_TO_INTEGER(target, source) \
   DECODE_WORD_REGISTER (target); \
   DECODE_WORD_REGISTER (source)
 
-#define SVM1_INST_INTEGER_TO_FIXNUM 0xa9
+#define SVM1_INST_INTEGER_TO_FIXNUM 0xaa
 #define DECODE_SVM1_INST_INTEGER_TO_FIXNUM(target, source) \
   DECODE_WORD_REGISTER (target); \
   DECODE_WORD_REGISTER (source)
 
-#define SVM1_INST_NOT 0xaa
+#define SVM1_INST_NOT 0xab
 #define DECODE_SVM1_INST_NOT(target, source) \
   DECODE_WORD_REGISTER (target); \
   DECODE_WORD_REGISTER (source)
 
-#define SVM1_INST_FLONUM_ALIGN 0xab
+#define SVM1_INST_FLONUM_ALIGN 0xac
 #define DECODE_SVM1_INST_FLONUM_ALIGN(target, source) \
   DECODE_WORD_REGISTER (target); \
   DECODE_WORD_REGISTER (source)
 
-#define SVM1_INST_FLONUM_LENGTH 0xac
+#define SVM1_INST_FLONUM_LENGTH 0xad
 #define DECODE_SVM1_INST_FLONUM_LENGTH(target, source) \
   DECODE_WORD_REGISTER (target); \
   DECODE_WORD_REGISTER (source)
 
-#define SVM1_INST_SQRT 0xad
+#define SVM1_INST_SQRT 0xae
 #define DECODE_SVM1_INST_SQRT(target, source) \
   DECODE_FLOAT_REGISTER (target); \
   DECODE_FLOAT_REGISTER (source)
 
-#define SVM1_INST_ROUND 0xae
+#define SVM1_INST_ROUND 0xaf
 #define DECODE_SVM1_INST_ROUND(target, source) \
   DECODE_FLOAT_REGISTER (target); \
   DECODE_FLOAT_REGISTER (source)
 
-#define SVM1_INST_CEILING 0xaf
+#define SVM1_INST_CEILING 0xb0
 #define DECODE_SVM1_INST_CEILING(target, source) \
   DECODE_FLOAT_REGISTER (target); \
   DECODE_FLOAT_REGISTER (source)
 
-#define SVM1_INST_FLOOR 0xb0
+#define SVM1_INST_FLOOR 0xb1
 #define DECODE_SVM1_INST_FLOOR(target, source) \
   DECODE_FLOAT_REGISTER (target); \
   DECODE_FLOAT_REGISTER (source)
 
-#define SVM1_INST_TRUNCATE 0xb1
+#define SVM1_INST_TRUNCATE 0xb2
 #define DECODE_SVM1_INST_TRUNCATE(target, source) \
   DECODE_FLOAT_REGISTER (target); \
   DECODE_FLOAT_REGISTER (source)
 
-#define SVM1_INST_LOG 0xb2
+#define SVM1_INST_LOG 0xb3
 #define DECODE_SVM1_INST_LOG(target, source) \
   DECODE_FLOAT_REGISTER (target); \
   DECODE_FLOAT_REGISTER (source)
 
-#define SVM1_INST_EXP 0xb3
+#define SVM1_INST_EXP 0xb4
 #define DECODE_SVM1_INST_EXP(target, source) \
   DECODE_FLOAT_REGISTER (target); \
   DECODE_FLOAT_REGISTER (source)
 
-#define SVM1_INST_COS 0xb4
+#define SVM1_INST_COS 0xb5
 #define DECODE_SVM1_INST_COS(target, source) \
   DECODE_FLOAT_REGISTER (target); \
   DECODE_FLOAT_REGISTER (source)
 
-#define SVM1_INST_SIN 0xb5
+#define SVM1_INST_SIN 0xb6
 #define DECODE_SVM1_INST_SIN(target, source) \
   DECODE_FLOAT_REGISTER (target); \
   DECODE_FLOAT_REGISTER (source)
 
-#define SVM1_INST_TAN 0xb6
+#define SVM1_INST_TAN 0xb7
 #define DECODE_SVM1_INST_TAN(target, source) \
   DECODE_FLOAT_REGISTER (target); \
   DECODE_FLOAT_REGISTER (source)
 
-#define SVM1_INST_ACOS 0xb7
+#define SVM1_INST_ACOS 0xb8
 #define DECODE_SVM1_INST_ACOS(target, source) \
   DECODE_FLOAT_REGISTER (target); \
   DECODE_FLOAT_REGISTER (source)
 
-#define SVM1_INST_ASIN 0xb8
+#define SVM1_INST_ASIN 0xb9
 #define DECODE_SVM1_INST_ASIN(target, source) \
   DECODE_FLOAT_REGISTER (target); \
   DECODE_FLOAT_REGISTER (source)
 
-#define SVM1_INST_ATAN 0xb9
+#define SVM1_INST_ATAN 0xba
 #define DECODE_SVM1_INST_ATAN(target, source) \
   DECODE_FLOAT_REGISTER (target); \
   DECODE_FLOAT_REGISTER (source)
 
-#define SVM1_INST_ADD_WR 0xba
+#define SVM1_INST_ADD_WR 0xbb
 #define DECODE_SVM1_INST_ADD_WR(target, source1, source2) \
   DECODE_WORD_REGISTER (target); \
   DECODE_WORD_REGISTER (source1); \
   DECODE_WORD_REGISTER (source2)
 
-#define SVM1_INST_ADD_FR 0xbb
+#define SVM1_INST_ADD_FR 0xbc
 #define DECODE_SVM1_INST_ADD_FR(target, source1, source2) \
   DECODE_FLOAT_REGISTER (target); \
   DECODE_FLOAT_REGISTER (source1); \
   DECODE_FLOAT_REGISTER (source2)
 
-#define SVM1_INST_SUBTRACT_WR 0xbc
+#define SVM1_INST_SUBTRACT_WR 0xbd
 #define DECODE_SVM1_INST_SUBTRACT_WR(target, source1, source2) \
   DECODE_WORD_REGISTER (target); \
   DECODE_WORD_REGISTER (source1); \
   DECODE_WORD_REGISTER (source2)
 
-#define SVM1_INST_SUBTRACT_FR 0xbd
+#define SVM1_INST_SUBTRACT_FR 0xbe
 #define DECODE_SVM1_INST_SUBTRACT_FR(target, source1, source2) \
   DECODE_FLOAT_REGISTER (target); \
   DECODE_FLOAT_REGISTER (source1); \
   DECODE_FLOAT_REGISTER (source2)
 
-#define SVM1_INST_MULTIPLY_WR 0xbe
+#define SVM1_INST_MULTIPLY_WR 0xbf
 #define DECODE_SVM1_INST_MULTIPLY_WR(target, source1, source2) \
   DECODE_WORD_REGISTER (target); \
   DECODE_WORD_REGISTER (source1); \
   DECODE_WORD_REGISTER (source2)
 
-#define SVM1_INST_MULTIPLY_FR 0xbf
+#define SVM1_INST_MULTIPLY_FR 0xc0
 #define DECODE_SVM1_INST_MULTIPLY_FR(target, source1, source2) \
   DECODE_FLOAT_REGISTER (target); \
   DECODE_FLOAT_REGISTER (source1); \
   DECODE_FLOAT_REGISTER (source2)
 
-#define SVM1_INST_PRODUCT 0xc0
+#define SVM1_INST_PRODUCT 0xc1
 #define DECODE_SVM1_INST_PRODUCT(target, source1, source2) \
   DECODE_WORD_REGISTER (target); \
   DECODE_WORD_REGISTER (source1); \
   DECODE_WORD_REGISTER (source2)
 
-#define SVM1_INST_QUOTIENT 0xc1
+#define SVM1_INST_QUOTIENT 0xc2
 #define DECODE_SVM1_INST_QUOTIENT(target, source1, source2) \
   DECODE_WORD_REGISTER (target); \
   DECODE_WORD_REGISTER (source1); \
   DECODE_WORD_REGISTER (source2)
 
-#define SVM1_INST_REMAINDER 0xc2
+#define SVM1_INST_REMAINDER 0xc3
 #define DECODE_SVM1_INST_REMAINDER(target, source1, source2) \
   DECODE_WORD_REGISTER (target); \
   DECODE_WORD_REGISTER (source1); \
   DECODE_WORD_REGISTER (source2)
 
-#define SVM1_INST_LSH 0xc3
+#define SVM1_INST_LSH 0xc4
 #define DECODE_SVM1_INST_LSH(target, source1, source2) \
   DECODE_WORD_REGISTER (target); \
   DECODE_WORD_REGISTER (source1); \
   DECODE_WORD_REGISTER (source2)
 
-#define SVM1_INST_AND 0xc4
+#define SVM1_INST_AND 0xc5
 #define DECODE_SVM1_INST_AND(target, source1, source2) \
   DECODE_WORD_REGISTER (target); \
   DECODE_WORD_REGISTER (source1); \
   DECODE_WORD_REGISTER (source2)
 
-#define SVM1_INST_ANDC 0xc5
+#define SVM1_INST_ANDC 0xc6
 #define DECODE_SVM1_INST_ANDC(target, source1, source2) \
   DECODE_WORD_REGISTER (target); \
   DECODE_WORD_REGISTER (source1); \
   DECODE_WORD_REGISTER (source2)
 
-#define SVM1_INST_OR 0xc6
+#define SVM1_INST_OR 0xc7
 #define DECODE_SVM1_INST_OR(target, source1, source2) \
   DECODE_WORD_REGISTER (target); \
   DECODE_WORD_REGISTER (source1); \
   DECODE_WORD_REGISTER (source2)
 
-#define SVM1_INST_XOR 0xc7
+#define SVM1_INST_XOR 0xc8
 #define DECODE_SVM1_INST_XOR(target, source1, source2) \
   DECODE_WORD_REGISTER (target); \
   DECODE_WORD_REGISTER (source1); \
   DECODE_WORD_REGISTER (source2)
 
-#define SVM1_INST_MAX_UNSIGNED 0xc8
+#define SVM1_INST_MAX_UNSIGNED 0xc9
 #define DECODE_SVM1_INST_MAX_UNSIGNED(target, source1, source2) \
   DECODE_WORD_REGISTER (target); \
   DECODE_WORD_REGISTER (source1); \
   DECODE_WORD_REGISTER (source2)
 
-#define SVM1_INST_MIN_UNSIGNED 0xc9
+#define SVM1_INST_MIN_UNSIGNED 0xca
 #define DECODE_SVM1_INST_MIN_UNSIGNED(target, source1, source2) \
   DECODE_WORD_REGISTER (target); \
   DECODE_WORD_REGISTER (source1); \
   DECODE_WORD_REGISTER (source2)
 
-#define SVM1_INST_DIVIDE 0xca
+#define SVM1_INST_DIVIDE 0xcb
 #define DECODE_SVM1_INST_DIVIDE(target, source1, source2) \
   DECODE_FLOAT_REGISTER (target); \
   DECODE_FLOAT_REGISTER (source1); \
   DECODE_FLOAT_REGISTER (source2)
 
-#define SVM1_INST_ATAN2 0xcb
+#define SVM1_INST_ATAN2 0xcc
 #define DECODE_SVM1_INST_ATAN2(target, source1, source2) \
   DECODE_FLOAT_REGISTER (target); \
   DECODE_FLOAT_REGISTER (source1); \
diff --git a/src/microcode/svm1-interp.c b/src/microcode/svm1-interp.c
index 7f4137ceb..396d99e9b 100644
--- a/src/microcode/svm1-interp.c
+++ b/src/microcode/svm1-interp.c
@@ -692,9 +692,9 @@ DEFINE_INST (ijump_u32)
 static inline void
 push_object (SCHEME_OBJECT object)
 {
-  stack_pointer = ((SCHEME_OBJECT *) (WREG_REF (SVM1_REG_STACK_POINTER)));
-  STACK_PUSH (object);
-  WREG_SET (SVM1_REG_STACK_POINTER, ((SCHEME_OBJECT) stack_pointer));
+  SCHEME_OBJECT * sp = ((SCHEME_OBJECT *) (WREG_REF (SVM1_REG_STACK_POINTER)));
+  (STACK_LOCATIVE_PUSH (sp)) = object;
+  WREG_SET (SVM1_REG_STACK_POINTER, ((word_t) sp));
 }
 
 static inline void
@@ -703,6 +703,15 @@ push_entry (uint8_t * PC)
   push_object (MAKE_CC_ENTRY (PC + CC_ENTRY_HEADER_SIZE));
 }
 
+static inline SCHEME_OBJECT
+pop_object ()
+{
+  SCHEME_OBJECT * sp = ((SCHEME_OBJECT *) (WREG_REF (SVM1_REG_STACK_POINTER)));
+  SCHEME_OBJECT object = (STACK_LOCATIVE_POP (sp));
+  WREG_SET (SVM1_REG_STACK_POINTER, ((word_t) sp));
+  return (object);
+}
+
 DEFINE_INST (icall_u8)
 {
   DECODE_SVM1_INST_ICALL_U8 (offset);
@@ -1084,6 +1093,11 @@ DEFINE_INTERRUPT_TEST (dynamic_link,
 		       (PC - 1),
 		       (MAKE_CC_STACK_ENV (WREG_REF (SVM1_REG_DYNAMIC_LINK))))
 
+DEFINE_INST (pop_return)
+{
+  return (BYTE_ADDR (OBJECT_ADDRESS (pop_object ())));
+}
+
 DEFINE_INST (enter_closure)
 {
   DECODE_SVM1_INST_ENTER_CLOSURE (index);
-- 
2.25.1