From 9b0698c0c16acadd0f6637f2fcfb3e44eaa98f3d Mon Sep 17 00:00:00 2001
From: ssmith <ssmith>
Date: Thu, 6 Apr 1995 18:15:39 +0000
Subject: [PATCH] Added COERCE as a midend phase.

---
 v8/src/compiler/machines/i386/decls.scm | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/v8/src/compiler/machines/i386/decls.scm b/v8/src/compiler/machines/i386/decls.scm
index fe42436cb..9da53e0f5 100644
--- a/v8/src/compiler/machines/i386/decls.scm
+++ b/v8/src/compiler/machines/i386/decls.scm
@@ -1,6 +1,6 @@
 #| -*-Scheme-*-
 
-$Id: decls.scm,v 1.1 1995/01/10 20:52:36 adams Exp $
+$Id: decls.scm,v 1.2 1995/04/06 18:15:39 ssmith Exp $
 
 Copyright (c) 1988-1994 Massachusetts Institute of Technology
 
@@ -348,7 +348,7 @@ MIT in each case. |#
 			      "rulrew")
 	     (filename/append "midend"
 			      "alpha" "applicat" "assconv" "cleanup"
-			      "closconv" "compat" "copier" "cpsconv"
+			      "closconv" "coerce" "compat" "copier" "cpsconv"
 			      "dataflow" "dbgstr" "debug" "earlyrew"
 			      "envconv" "expand" "fakeprim" "graph"
 			      "indexify" "inlate" "lamlift" "laterew"
-- 
2.25.1