From b1a6f0de85d0d87c9053948de75bc76e4a3961d2 Mon Sep 17 00:00:00 2001
From: Chris Hanson <org/chris-hanson/cph>
Date: Fri, 12 Jul 1991 23:15:43 +0000
Subject: [PATCH] Add initialization code to enable the IEEE traps.

---
 v7/src/microcode/cmpauxmd/mips.m4 | 16 ++++++++++++++--
 v7/src/microcode/cmpint.c         | 11 ++++++++++-
 v7/src/microcode/cmpintmd/mips.h  | 11 ++++++++++-
 v8/src/microcode/cmpint.c         | 11 ++++++++++-
 4 files changed, 44 insertions(+), 5 deletions(-)

diff --git a/v7/src/microcode/cmpauxmd/mips.m4 b/v7/src/microcode/cmpauxmd/mips.m4
index a45546423..41ec00778 100644
--- a/v7/src/microcode/cmpauxmd/mips.m4
+++ b/v7/src/microcode/cmpauxmd/mips.m4
@@ -1,9 +1,9 @@
 /* #define DEBUG_INTERFACE */
  ### -*-Midas-*-
  ###
- ###	$Header: /Users/cph/tmp/foo/mit-scheme/mit-scheme/v7/src/microcode/cmpauxmd/mips.m4,v 1.3 1990/08/14 18:22:54 cph Rel $
+ ###	$Header: /Users/cph/tmp/foo/mit-scheme/mit-scheme/v7/src/microcode/cmpauxmd/mips.m4,v 1.4 1991/07/12 23:14:52 cph Exp $
  ###
- ###	Copyright (c) 1989, 1990 Massachusetts Institute of Technology
+ ###	Copyright (c) 1989-91 Massachusetts Institute of Technology
  ###
  ###	This material was developed by the Scheme project at the
  ###	Massachusetts Institute of Technology, Department of
@@ -335,6 +335,18 @@ Bad_Free_Pointer:
 	addi	$0,$0,0
 #endif
 
+	.globl	interface_initialize
+	.ent	interface_initialize
+interface_initialize:
+	.frame	$sp,0,$31
+	cfc1	$25,$31		# read FPU control register
+	nop
+	ori	$25,$25,0xf00	# enable V, Z, O, U traps
+	ctc1	$25,$31		# write FPU control register
+	j	$31		# return
+	nop
+	.end	interface_initialize
+
 	.globl	generate_closure
 	.ent	generate_closure
 generate_closure:
diff --git a/v7/src/microcode/cmpint.c b/v7/src/microcode/cmpint.c
index 0bc27cb19..20f7108d6 100644
--- a/v7/src/microcode/cmpint.c
+++ b/v7/src/microcode/cmpint.c
@@ -1,6 +1,6 @@
 /* -*-C-*-
 
-$Header: /Users/cph/tmp/foo/mit-scheme/mit-scheme/v7/src/microcode/cmpint.c,v 1.36 1991/05/05 00:41:58 jinx Exp $
+$Header: /Users/cph/tmp/foo/mit-scheme/mit-scheme/v7/src/microcode/cmpint.c,v 1.37 1991/07/12 23:15:43 cph Exp $
 
 Copyright (c) 1989-1991 Massachusetts Institute of Technology
 
@@ -2802,6 +2802,15 @@ DEFUN (compiler_initialize,
     /* Delay until after band-load, when compiler_reset will be invoked. */
     compiler_utilities = SHARP_F;
     return_to_interpreter = SHARP_F;
+#ifdef sonyrisc
+    /* On the Sony NEWS 3250, this procedure initializes the
+       floating-point CPU control register to enable the IEEE traps.
+       This is normally executed by `compiler_reset' from LOAD-BAND,
+       but the Sony operating system saves the control register in
+       `setjmp' and restores it on `longjmp', so we must initialize
+       the register before `setjmp' is called.  */
+    interface_initialize ();
+#endif
   }
   return;
 }
diff --git a/v7/src/microcode/cmpintmd/mips.h b/v7/src/microcode/cmpintmd/mips.h
index 5e869dd21..21d83431f 100644
--- a/v7/src/microcode/cmpintmd/mips.h
+++ b/v7/src/microcode/cmpintmd/mips.h
@@ -1,6 +1,6 @@
 /* -*-C-*-
 
-$Header: /Users/cph/tmp/foo/mit-scheme/mit-scheme/v7/src/microcode/cmpintmd/mips.h,v 1.8 1991/06/15 00:40:07 cph Exp $
+$Header: /Users/cph/tmp/foo/mit-scheme/mit-scheme/v7/src/microcode/cmpintmd/mips.h,v 1.9 1991/07/12 23:15:20 cph Exp $
 
 Copyright (c) 1989-91 Massachusetts Institute of Technology
 
@@ -430,6 +430,8 @@ do {									\
   (*opcode_addr) = (ADDI_OPCODE << 2);					\
 }
 
+extern void EXFUN (interface_initialize, (void));
+
 /* This flushes the Scheme portion of the I-cache.
    It is used after a GC or disk-restore.
    It's needed because the GC has moved code around, and closures
@@ -460,6 +462,13 @@ do {									\
 {									\
   ICACHEFLUSH ((address), ((sizeof (long)) * (nwords)));		\
 } while (0)
+
+
+#ifdef IN_CMPINT_C
+
+#define ASM_RESET_HOOK interface_initialize
+
+#endif /* IN_CMPINT_C */
 
 /* Derived parameters and macros.
 
diff --git a/v8/src/microcode/cmpint.c b/v8/src/microcode/cmpint.c
index f4553ea33..22e8b0d1e 100644
--- a/v8/src/microcode/cmpint.c
+++ b/v8/src/microcode/cmpint.c
@@ -1,6 +1,6 @@
 /* -*-C-*-
 
-$Header: /Users/cph/tmp/foo/mit-scheme/mit-scheme/v8/src/microcode/cmpint.c,v 1.36 1991/05/05 00:41:58 jinx Exp $
+$Header: /Users/cph/tmp/foo/mit-scheme/mit-scheme/v8/src/microcode/cmpint.c,v 1.37 1991/07/12 23:15:43 cph Exp $
 
 Copyright (c) 1989-1991 Massachusetts Institute of Technology
 
@@ -2802,6 +2802,15 @@ DEFUN (compiler_initialize,
     /* Delay until after band-load, when compiler_reset will be invoked. */
     compiler_utilities = SHARP_F;
     return_to_interpreter = SHARP_F;
+#ifdef sonyrisc
+    /* On the Sony NEWS 3250, this procedure initializes the
+       floating-point CPU control register to enable the IEEE traps.
+       This is normally executed by `compiler_reset' from LOAD-BAND,
+       but the Sony operating system saves the control register in
+       `setjmp' and restores it on `longjmp', so we must initialize
+       the register before `setjmp' is called.  */
+    interface_initialize ();
+#endif
   }
   return;
 }
-- 
2.25.1