From d6bcc517739ba05c4b839c86ec4254911b74ebed Mon Sep 17 00:00:00 2001
From: "Guillermo J. Rozas" <edu/mit/csail/zurich/gjr>
Date: Tue, 11 Feb 1992 14:47:21 +0000
Subject: [PATCH] More changes.

---
 v7/src/compiler/machines/i386/insutl.scm | 155 ++++++++++++++++++++++-
 1 file changed, 153 insertions(+), 2 deletions(-)

diff --git a/v7/src/compiler/machines/i386/insutl.scm b/v7/src/compiler/machines/i386/insutl.scm
index 9dd24e1fb..5139ce5be 100644
--- a/v7/src/compiler/machines/i386/insutl.scm
+++ b/v7/src/compiler/machines/i386/insutl.scm
@@ -1,6 +1,6 @@
 #| -*-Scheme-*-
 
-$Header: /Users/cph/tmp/foo/mit-scheme/mit-scheme/v7/src/compiler/machines/i386/insutl.scm,v 1.2 1992/02/09 03:45:36 jinx Exp $
+$Header: /Users/cph/tmp/foo/mit-scheme/mit-scheme/v7/src/compiler/machines/i386/insutl.scm,v 1.3 1992/02/11 14:47:21 jinx Exp $
 
 Copyright (c) 1992 Massachusetts Institute of Technology
 
@@ -36,6 +36,136 @@ MIT in each case. |#
 
 (declare (usual-integrations))
 
+;;;; Addressing modes
+
+;; r/m part of ModR/M byte and SIB byte.
+;; These are valid only for 32-bit addressing.
+
+(define-ea-database
+  ((R (? r))
+   (REGISTER)
+   #b11 r)
+
+  ((@R (? r indirect-reg))
+   (MEMORY)
+   #b00 r)
+
+  ((@R 5)				; EBP
+   (MEMORY)
+   #b01 5
+   (BYTE (8 0)))
+
+  ((@R 4)				; ESP
+   (MEMORY)
+   #b00 4
+   (BYTE (2 0)
+	 (3 4)
+	 (3 4)))
+
+  ((@RO B (? r index-reg) (? offset))
+   (MEMORY)
+   #b01 r
+   (BYTE (8 offset SIGNED)))
+
+  ((@RO UB (? r index-reg) (? offset))
+   (MEMORY)
+   #b01 r
+   (BYTE (8 offset UNSIGNED)))
+
+  ((@RO B 4 (? offset))
+   (MEMORY)
+   #b01 4
+   (BYTE (2 0)
+	 (3 4)
+	 (3 4)
+	 (8 offset SIGNED)))
+
+  ((@RO UB 4 (? offset))
+   (MEMORY)
+   #b01 4
+   (BYTE (2 0)
+	 (3 4)
+	 (3 4)
+	 (8 offset UNSIGNED)))
+
+  ((@RO W (? r index-reg) (? offset))
+   (MEMORY)
+   #b10 r
+   (IMMEDIATE offset ADDRESS SIGNED))
+
+  ((@RO UW (? r index-reg) (? offset))
+   (MEMORY)
+   #b10 r
+   (IMMEDIATE offset ADDRESS UNSIGNED))
+
+  ((@RO W 4 (? offset))			; ESP
+   (MEMORY)
+   #b10 #b100
+   (BYTE (2 0)
+	 (3 4)
+	 (3 4))
+   (IMMEDIATE offset ADDRESS SIGNED))
+
+  ((@RO UW 4 (? offset))		; ESP
+   (MEMORY)
+   #b10 #b100
+   (BYTE (2 0)
+	 (3 4)
+	 (3 4))
+   (IMMEDIATE offset ADDRESS UNSIGNED))
+   
+  ((@RI (? b base-reg) (? i index-reg) (? s index-scale))
+   (MEMORY)
+   #b00 #b100
+   (BYTE (2 s)
+	 (3 i)
+	 (3 b)))
+
+  ((@RI 5 (? i index-reg) (? s index-scale)) ; EBP
+   (MEMORY)
+   #b01 #b100
+   (BYTE (2 s)
+	 (3 i)
+	 (3 5)
+	 (8 0)))
+
+  ((@ROI B (? b) (? offset) (? i index-reg) (? s index-scale))
+   (MEMORY)
+   #b01 #b100
+   (BYTE (2 s)
+	 (3 i)
+	 (3 b)
+	 (8 offset SIGNED)))
+
+  ((@ROI UB (? b) (? offset) (? i index-reg) (? s index-scale))
+   (MEMORY)
+   #b01 #b100
+   (BYTE (2 s)
+	 (3 i)
+	 (3 b)
+	 (8 offset UNSIGNED)))
+
+  ((@ROI W (? b) (? offset) (? i index-reg) (? s index-scale))
+   (MEMORY)
+   #b10 #b100
+   (BYTE (2 s)
+	 (3 i)
+	 (3 b))
+   (IMMEDIATE offset ADDRESS SIGNED))
+
+  ((@ROI UW (? b) (? offset) (? i index-reg) (? s index-scale))
+   (MEMORY)
+   #b10 #b100
+   (BYTE (2 s)
+	 (3 i)
+	 (3 b))
+   (IMMEDIATE offset ADDRESS UNSIGNED))
+
+  ((@ (? value))
+   (MEMORY)
+   #b00 #b101
+   (IMMEDIATE value ADDRESS)))
+
 (define-integrable (fits-in-signed-byte? value)
   (and (>= value -128) (< value 128)))
 
@@ -48,4 +178,25 @@ MIT in each case. |#
 
 (define (zero-extended-byte value)
   (and (fits-in-unsigned-byte? value)
-       value))
\ No newline at end of file
+       value))
+
+(define-integrable (indirect-reg r)
+  (and (not (= r esp))
+       (not (= r ebp))
+       r))
+
+(define-integrable (base-reg r)
+  (and (not (= r ebp))
+       r))
+
+(define-integrable (index-reg r)
+  (and (not (= r esp))
+       r))
+
+(define (index-scale scale-value)
+  (case scale-value
+    ((1) #b00)
+    ((2) #b01)
+    ((4) #b10)
+    ((8) #b11)
+    (else false)))
\ No newline at end of file
-- 
2.25.1